Apple Melbourne is seeking a forward-thinking Physical Design Engineer to drive high-performance PHY and SOC design from RTL to GDSII. You will partner with architecture, CAD, timing and logic teams to deliver robust, power-aware designs that meet tight constraints across a wide range of Apple products.
The role emphasizes floorplanning, clock networks, and implementation of ECOs, with a focus on correct-by-construction methodologies and LVS/DRC accuracy in a cutting-edge hardware setting.