Meta Reality Labs is seeking a Memory Architect on the Subsystem Architecture team to drive on-chip memory design for wearable AR/AI enabled chips.
You will collaborate with senior memory architects to balance caches, scratchpads, SRAM and memory hierarchy within tight wearable budgets.
The role requires 2+ years in memory-focused silicon work and robust modeling skills, with a PhD preferred.
You will help define pre-silicon and silicon memory approaches across accelerator IPs and subsystems.
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📌 Memory Architect, Subsystem For Wearable Ai Chips (Western Australia)
🏢 Meta
📍 Western Australia
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