- Conduct SEM defect review and accurate classification of defects observed in wafer fabrication processes.
- Interpret and analyze yield loss mechanisms, correlating defect patterns with process-related issues.
- Evaluate excursion events and make informed lot-hold or release recommendations based on empirical evidence and industry best practices.
- Review, interpret, and annotate wafer sort and test floor data, including bin maps and parametric datasets.
- Identify defect paretos and contribute to source attribution analysis to trace root causes.
- Document observations, communicate technical findings, and provide actionable feedback in transparent, concise written and verbal formats for integration into AI learning modules.
Requirements
- Extensive hands-on experience in wafer fab environments, with a focus on SEM-based defect review and yield analysis.
- Demonstrated expertise in production fabs with integrated sort/test floors.
- Proficiency with defect classification methodologies, excursion management, and yield improvement strategies.
- Strong ability to analyze wafer sort/bin data and interpret test floor metrics to inform defect and yield investigations.
- Exceptional written and verbal communication skills, able to explain complex technical concepts to diverse audiences.
- Background in process integration or defect/yield engineering at major semiconductor manufacturing facilities.
Application Process
- Easy Apply on LinkedIn
- Check email for next steps
- Participate in resume evaluation & interview stage