03 Nov
|
Centro Escolar University
|
Sydney
03 Nov
Centro Escolar University
Sydney
Optiver is offering a 10-week FPGA Developer Intern position in Sydney. You’ll work with experienced hardware engineers to build latency-sensitive trading systems and learn with our world-class training program.
You’ll be paired with a seasoned FPGA developer, design real-time systems, test benches in VHDL/SystemVerilog, and gain exposure to cutting-edge networking and data processing. Successful interns may receive a full time graduate offer.
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📌 FPGA Developer Intern: Build Latency-Critical Trading Tech (Sydney)
🏢 Centro Escolar University
📍 Sydney