FPGA Development Intern: Build Ultra-Low Latency Trading (Sydney)

FPGA Development Intern: Build Ultra-Low Latency Trading (Sydney)

01 Nov
|
Stfrancis
|
Sydney

01 Nov

Stfrancis

Sydney

Optiver is seeking an FPGA Developer Intern in Australia. You will work with seasoned FPGA engineers to accelerate latency-critical trading systems and learn through an intensive 10-week program. You will be paired with a mentor and contribute to multiple areas, including design, testing, and data communication improvements.

You will gain hands-on experience with VHDL/Verilog, System Verilog, and Python/C++, while receiving training on trading fundamentals and software development processes.

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📌 FPGA Development Intern: Build Ultra-Low Latency Trading (Sydney)
🏢 Stfrancis
📍 Sydney

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