A leading recruitment firm in Australia seeks a Verification Engineer to join a cutting-edge SoC design team in Adelaide. In this role, you will take ownership of verification processes for advanced designs and develop UVM-based test environments. Ideal candidates should have over 5 years of experience in digital design or SoC verification, with strong skills in System Verilog/Verilog and familiarity with industry-standard tools. Enjoy a supportive workplace focused on technical excellence and career growth. #J-18808-Ljbffr