Arm's Cambridge-based SOC Design Engineer role focuses on developing System on Chips by integrating IP blocks such as CPU clusters, PCIe and memory interfaces. You will draft micro-architecture specs, create RTL designs in Verilog/SystemVerilog, and collaborate with verification to meet timing and power goals.
You will participate in backend tasks like floor planning and timing closure, while contributing to design methodologies and mentoring teammates in a energetic hardware team.
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📌 Soc Design Engineer: Rtl & Ip Integration, Visa Friendly Cambridge (Town of Cambridge)
🏢 ARM
📍 Town of Cambridge
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