Arm's Cambridge-based SOC Design Engineer role focuses on developing System on Chips by integrating IP blocks such as CPU clusters, PCIe and memory interfaces.
You will draft micro-architecture specs, create RTL designs in Verilog/SystemVerilog, and collaborate with verification to meet timing and power goals.You will participate in backend tasks like floor planning and timing closure, while contributing to design methodologies and mentoring teammates in a energetic hardware team.
#J-*****-Ljbffr
📌 Soc Design Engineer: Rtl & Ip Integration, Visa Friendly (Western Australia)
🏢 ARM
📍 Western Australia
Reply to this offer
Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.