Senior Hardware Verification Engineer - Soc Ip Test Lead (Western Australia)

Senior Hardware Verification Engineer - Soc Ip Test Lead (Western Australia)

21 Oct
|
Baya Systems
|
Western Australia

21 Oct

Baya Systems

Western Australia

Baya Systems is inspired by the baya bird, also known as the weaver.
Baya birds weave very unique and intricate hanging nests from different materials.
The nests are robust and safe while being extremely lightweight and efficient.Baya is a fast-moving Series B startup built by serial entrepreneurs with a vision to accelerate intelligent computing in the emerging chiplet era.
We focus on software-driven, unified fabric solutions for single-die and multi-die systems.
We design and license disruptive intellectual property for use in semiconductor chips, with software development platforms to simplify the design process and reduce the time to market for complex System-on-Chip (SoC) and multi-chiplet systems.
This enables our partners to innovate and deliver compelling solutions for data center, infrastructure, AI, Automotive, and Edge IoT markets.
We are looking for energetic and dedicated individuals share our passion for enabling innovation and excellence in the semiconductor industry that empowers game-changing products and services!
DESIGN VERIFICATION ENGINEEREngland, UK (Bristol, Cambridge, London)We are seeking a seasoned Design Verification designer with a robust background in building testbenches and writing test sequences for complex IPs.
The ideal candidate will play a key role in shaping our technology portfolio,



bringing expertise and creativity to our solutionsResponsibilities:Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systemsWrite UVM/SystemVerilog code to implement the test plan, checkers, and scoreboardsCollaborate with software teams to define and implement configurable testbenchesWork with design teams test plans, failure debug, coverage, etc.Qualifications and Preferred SkillsBS, MS in Electrical Engineering, Computer Engineering or Computer Science8+ years and current hands-on experience in block-level/IP-level/SoC-level verificationProficiency in Verilog, SystemVerilogFamiliarity with industry-standard EDA tools for simulation and debugDeep experience with UVM-based testbenchesExperience with modern programming languages like PythonKnowledge of Arm AMBA protocols such as AXI, APB, and AHBUnderstanding of Arm CHI protocol is a plusExperience on working with IP's for caches, cache coherency, memory subsystems, interconnects, and NoC'sExperience with formal verification techniques, emulation platforms is a plusExcellent problem-solving skills and attention to detailStrong communication and collaboration skillsCompensation:Salary commensurate with experiencePerformance incentivesComprehensive medical, dental, and vision benefits401(k) retirement planEquity
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📌 Senior Hardware Verification Engineer - Soc Ip Test Lead (Western Australia)
🏢 Baya Systems
📍 Western Australia

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