Senior Fpga Engineer - Low-Latency Trading Systems (Sydney)

Senior Fpga Engineer - Low-Latency Trading Systems (Sydney)

21 Oct
|
Tradermath
|
Sydney

21 Oct

Tradermath

Sydney

VivCourt is seeking an FPGA Engineer to join a collaborative team building high-performance, low-latency FPGA systems for electronic trading.
You will contribute across the development lifecycle, owning the systems you build and engaging in technical discussions shaping our FPGA platform.
Ideal candidates bring solid FPGA/ASIC experience with SystemVerilog or VHDL, plus Python or C++ development and a focus on solving complex problems.
Hybrid work model offered.
#J-*****-Ljbffr

📌 Senior Fpga Engineer - Low-Latency Trading Systems (Sydney)
🏢 Tradermath
📍 Sydney

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