17 Oct
|
SpaceX
|
Redmond
SpaceX is hiring an FPGA/ASIC Design Engineer to develop next‑gen FPGAs and ASICs for Starlink, working with cross‑functional teams across systems, firmware, and software. You’ll design complex SoCs, optimize power and performance, and participate in full lifecycle from architectural concepts to lab bring‑up.
The role emphasizes collaboration with backend teams and a focus on on-satellite and ground infrastructure deployments to expand Starlink’s global connectivity.
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📌 FPGA/ASIC Design Engineer for Space-Grade SoCs (Redmond)
🏢 SpaceX
📍 Redmond