Senior FPGA Verification Engineer — RTL, UVM & Xilinx (Melbourne)

Senior FPGA Verification Engineer — RTL, UVM & Xilinx (Melbourne)

11 Oct
|
Sapsol Technologies
|
Melbourne

11 Oct

Sapsol Technologies

Melbourne

Sapsol Technologies Inc. is seeking an expert FPGA verification engineer to join our design verification team in Melbourne. The role focuses on SystemVerilog/UVM-driven verification, FPGA lab testing, and collaboration with India GETC‑I for DO-254 process guidance.

The ideal candidate has 5+ years of experience in FPGA/ASIC verification, a STEM degree, and a proven track record with Xilinx platforms. Senior responsibilities include developing verification environments and ensuring robust

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📌 Senior FPGA Verification Engineer — RTL, UVM & Xilinx (Melbourne)
🏢 Sapsol Technologies
📍 Melbourne

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