Job Description

Morse Micro is at the forefront of next-generation Wi‐Fi technology, delivering breakthrough solutions that redefine wireless connectivity. Our innovative products are designed to meet the demands of the rapidly evolving market, providing superior performance and reliability.

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Do you want to play a key role in building next generation Wi‐Fi chips that will truly enable the Internet of Things (IoT)? Keen to make a real difference in a VC‐backed high‐growth company while working in a dynamic & fun environment? Then join Morse Micro, Australia's largest fabless semiconductor company!

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We welcome applications from overseas candidates, with relocation and visa support available for the successful applicant.

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Your responsibilities would include:

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- Deliver SystemVerilog and Chisel RTL across chip, subsystem, and block levels, meeting PPA targets.
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- Own microarchitecture and design specifications for chip-, subsystem-, and block-level digital logic.
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- Drive verification strategy and test plan closure (RTL sims, GLS, X-prop, CDC/RDC, lint, FPGA emulation) through our phase‐gate methodology.
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- Derive product, subsystem, and block‐level feature and performance requirements by studying competitor parts, tracking state of the art in low‐power wireless/IoT SoCs, and translating market direction into technical specifications.
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- Enhance and maintain our digital design and verification infrastructure.
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- Architect clocking, reset, and power domains; author and close UPF/CPF power intent through to GLS and PA simulation.
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- Apply low‐power techniques (clock gating, power gating, retention, isolation) appropriate to battery‐ and energy‐harvesting IoT applications.
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- Integrate mixed‐signal IP (ADPLL, PHY, pads, analog macros) and own the digital/analog interface contract.
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- Partner with firmware and PHY/MAC teams on register interfaces,



programming models, interrupts, and boot sequences to enable efficient HW/SW co‐design.
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- Take on chip‐lead duties: drive system verification, synthesis QoR, P&R; support, gate‐level netlist and power‐aware sims, ECO and LEC closure, and tapeout checklist completion.
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- Coordinate across analog, layout, PnR, DFT, and SW teams to hit major project milestones.
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- Use AI coding assistants and agents fluently across RTL, verification, scripting, and documentation tasks, with sound judgement on where they accelerate work and where they need close review.
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- Identify opportunities to apply AI to our design and verification flows — spec analysis, test generation, debug, code review, infrastructure automation — and drive their adoption across the team.
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- Deliver large, complex projects on schedule with multiple concurrent spins.
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- Mentor junior team members and uphold design quality through reviews, coding standards, and methodology improvements.
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Essential skills (you must have):

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- Bsc/MSc/Phd in Electrical / Electronics / Communication Engineering or Computer Science
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- 5+ years experience as a Senior Digital Engineer
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- Proven experience in the development of complex digital blocks, subsystems, or SoC architectures
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- Strong understanding of digital design fundamentals, RTL design methodologies, synthesis flows, and ECO implementation/debug
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- Solid expertise in Verilog/SystemVerilog, digital verification methodologies, C programming, and CDC/RDC analysis
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- Proficiency in scripting and automation using Python, Tcl, Shell, Makefiles, or similar languages/tools
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- Experience with design automation and infrastructure development is highly desirable.
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- Knowledge of low‐power design techniques, including clock gating, power domains, power gating, retention, and isolation, is a plus
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- Familiarity with embedded systems, bus or processor architectures is an advantage
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- Excellent verbal and written communication skills
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- Proven to work constructively within your team and among other groups
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- Strong analytical and problem‐solving skills
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- A determination to deliver even when subject to time pressures
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- A hands‐on, practical attitude
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What we offer:

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- Market-competitive salary + excellent stock option package
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- Performance Bonus opportunity
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- Income protection Insurance
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- Healthy work environment with sit/stand desks and large screens
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- Lots of snacks & drinks, including barista coffee, Friday team lunches & some of the world's best beers
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- Flexible working hours
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- Work from home policy
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- Community & social groups and much more
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- Join a high performing, inclusive company where you can make a real impact
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Who we are:

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Morse Micro is Australia's largest semiconductor company building Wi‐Fi HaLow (802.11ah) chips for the Internet of Things (IoT). We are a team of wireless experts that love to work hard, innovate & invent. Together, we are building the world's lowest power Wi‐Fi technology that will enable billions of IoT devices to connect securely to the internet. We are a global team with offices in Sydney, Picton & Melbourne (Australia), Irvine & San Jose (USA), Bangalore (India), Cambridge (UK), Hangzhou & Shenzen (China), Taipei (Taiwan) and Tokyo (Japan).

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