Job Description

Overview

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Head of Electronic Trading Technology Recruitment APAC at GQR Global Markets

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For this particular position, you will be part of the FPGA function, a key division driving innovation in trading technologies. As a member of this team, your primary responsibility will be contributing to the testing of custom FPGA-based trading platforms. These platforms are designed to ensure that the team operates efficiently on exchanges across the globe. This is a unique opportunity to work with cutting-edge technology at the forefront of trading infrastructure. The systems are written in System Verilog, C++, and Python targeting the state of the art FPGAs. We are looking for talented senior test and verification engineers with a track record of achievement in any domain. You may have experience of finance and trading, but it is not essential.

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Responsibilities

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- FPGA systems testing and verification strategies
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- Setting testing and verification standards
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- Implementing simulation and hardware testing for multiple exchanges
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- A deep understanding of functional verification, code linting and hardware testing
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- Solid understanding of layered reusable environments, scoreboards, functional coverage models, randomized stimulus, and self-checking harnesses using SystemVerilog, UVM or cocotb
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- Python and C++ programming in a Linux setting
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- Familiarity with CI/CD pipelines (Jenkins, GitLab CI, Bamboo, etc)
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- An ability to see through complexity to identify simple solutions
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- Excellent problem-solving skills and the ability to work independently and as part of a team
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- Strong understanding of networking concepts including TCP/IP, UDP/IP is desirable
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Qualifications

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- Prior experience in testing and verification of FPGA-based trading platforms or related hardware/software systems
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- Experience with SystemVerilog, UVM or cocotb and hardware verification methodologies
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- Proficiency in Python and C++ in a Linux environment
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- Understanding of CI/CD pipelines
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- Strong problem-solving skills and ability to work independently and in a team
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- Familiarity with networking concepts (TCP/IP, UDP/IP) is desirable
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While a resume is preferable we also welcome tentative inquiries from well-qualified persons. Utmost confidentiality and discretion are assured. If interested, please email [email protected]

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Seniority level

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- Mid-Senior level
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Employment type

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- Full-time
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Job function

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- Information Technology
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Industries

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- Technology, Information and Media and Financial Services
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📌 FPGA Test and Verification Engineer (New South Wales)
🏢 Gqr
📍 New South Wales