Senior IC Verification Architect (UVM/SystemVerilog) (Australia)

Senior IC Verification Architect (UVM/SystemVerilog) (Australia)

06 Aug
|
Infineon Technologies
|
Australia

06 Aug

Infineon Technologies

Australia

Infineon Technologies Australia is seeking a senior IC verification engineer to lead detailed simulation, verification and validation of complex ASICs. You will design testbenches in SystemVerilog/UVM for functional and power-aware RTL, and build UVM components like agents, scoreboards and environments.

You will drive verification metrics, collaborate with cross-functional teams, and communicate with customers during design reviews and weekly calls to keep schedules and quality on track.

#J-18808-Ljbffr

📌 Senior IC Verification Architect (UVM/SystemVerilog) (Australia)
🏢 Infineon Technologies
📍 Australia

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