An established technology company located in Cambridge is seeking a Physical Design Engineer to join their growing team. This position offers an excellent opportunity to work within a collaborative workplace, contributing throughout the entire chip development lifecycle, from initial design stages to silicon delivery and product launch. The team is relatively small, allowing engineers to gain broad exposure and make a significant impact on product development.
Key Responsibilities
- Contribute to the complete physical design implementation process, from netlist to GDSII.
- Engage in floorplanning, power planning, placement, optimization, clock tree synthesis, routing, and physical verification closure.
- Perform timing closure and static timing analysis.
- Conduct logic synthesis, equivalence checking,
and place-and-route methodologies.
- Work on complex ASIC or SoC designs in advanced semiconductor environments.
Requirements
- Possess a strong academic background in Electronics, Electrical Engineering, or a related field.
- Have a minimum of two years of industry experience in Physical Design or Physical Implementation.
- Demonstrate a solid understanding of modern ASIC implementation flows and methodologies.
- Exhibit strong communication skills and the ability to collaborate effectively within cross-functional engineering teams.
This is a fantastic opportunity to join a company with a strong engineering culture, work on technically challenging products, and become part of a close-knit team where your contributions will have a direct impact.