Overview

Head of Electronic Trading Technology Recruitment APAC at GQR Global Markets

For this particular position, you will be part of the FPGA function, a key division driving innovation in trading technologies. As a member of this team, your primary responsibility will be contributing to the testing of custom FPGA-based trading platforms. These platforms are designed to ensure that the team operates efficiently on exchanges across the globe. This is a unique prospect to work with cutting-edge technology at the forefront of trading infrastructure. The systems are written in System Verilog, C++, and Python targeting the state of the art FPGAs. We are looking for talented senior test and verification engineers with a track record of achievement in any domain. You may have experience of finance and trading, but it is not essential.

Responsibilities

- FPGA systems testing and verification strategies
- Setting testing and verification standards
- Implementing simulation and hardware testing for multiple exchanges
- A deep understanding of functional verification, code linting and hardware testing
- Solid understanding of layered reusable environments, scoreboards, functional coverage models, randomized stimulus, and self-checking harnesses using SystemVerilog, UVM or cocotb
- Python and C++ programming in a Linux environment
- Familiarity with CI/CD pipelines (Jenkins, GitLab CI, Bamboo, etc)




- An ability to see through complexity to identify simple solutions
- Excellent problem-solving skills and the ability to work independently and as part of a team
- Strong understanding of networking concepts including TCP/IP, UDP/IP is desirable

Qualifications

- Prior experience in testing and verification of FPGA-based trading platforms or related hardware/software systems
- Experience with SystemVerilog, UVM or cocotb and hardware verification methodologies
- Proficiency in Python and C++ in a Linux environment
- Understanding of CI/CD pipelines
- Strong problem-solving skills and ability to work independently and in a team
- Familiarity with networking concepts (TCP/IP, UDP/IP) is desirable

While a resume is preferable we also welcome tentative inquiries from well-qualified persons. Utmost confidentiality and discretion are assured. If interested, please email

Seniority level

- Mid-Senior level

Employment type

- Full-time

Job function

- Information Technology

Industries

- Technology, Information and Media and Financial Services

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📌 FPGA Test and Verification Engineer (City of Sydney)
🏢 Gqr
📍 City of Sydney